Generally, SOI (silicon on insulator) substrates employ a silicon layer present on an insulating film arranged on a silicon wafer and thus have a structure in which the insulating layer is buried in the silicon layer. Accordingly, in MOS devices wherein a MOS transistor is formed on an SOI substrate, a body layer of the MOS transistor is isolated due to the buried insulating film and a device-isolation film, thus exhibiting high speed, superior integration level and low power consumption. Depending on the thickness of the silicon layer, SOI substrates are classified into fully-depleted (FD) types and partially-depleted (PD) types.
In comparison, MOSFET devices, which use bulk silicon, have high power consumption and low access speed, as compared to SOI devices. SOI devices operate at low voltages and thus have an advantage of decreased power consumption. In addition, SOI devices are completely insulated from the substrate and thus exhibit a low parasitic capacitance, thereby decreasing leakage current and realizing high-speed transistors. Further, SOI devices are free of latch-up by parasitic devices and have low short channel effects.
However, related SOI devices may be sensitive to the quality of raw materials and may have economic drawbacks due to high manufacturing costs. FIG. 1A illustrates a related FD SOI semiconductor device, and FIG. 1B illustrates a related PD SOI semiconductor device. Referring to FIG. 1A, the fully-depleted SOI semiconductor device has a thin body 10, thus exhibiting little floating body effect and being stable at threshold voltages. However, due to the thin silicon body 10, the related SOI semiconductor device has a low process margin upon forming contacts or silicides and is sensitive to the SOI thickness, thus causing fluctuation in its threshold voltage.
Referring to FIG. 1B, a related partially-depleted SOI semiconductor device has a relatively large silicon body 20, thus having a high process margin and exhibiting little influence of SOI thickness on threshold voltage. However, the related partially-depleted SOI semiconductor device is sensitive to short channel and floating body effects, thus causing variation in device characteristics, as compared to related FD SOI semiconductor devices.